This invention relates to a logic operation device implemented by a large scale integrated circuit. The present invention is also directed to a logic operation process using the above logic operation device.
It is desired that a logic operation device perform the operation both at a high speed and with a high reliability. As a method for enhancing the reliability there is known a method in which two sets of the same ALU units are used. A logic operation device adopting such a dual system is provided with two ALU units to each of which common data is supplied. The operation results obtained from these ALU units are continuously compared for checking. While such a dual system can enhance the reliability, the amount of hardware is unavoidably increased because of the necessity for using two sets of the same ALU units.
In order to increase the operation speed, it is necessary to use a logic operation device including a logic circuit utilizing circuit elements capable of operating at a high speed. Furthermore, the logic operation device is required to be implemented by a large scale integrated circuit in order to shorten wires connecting the parts of the device. As a logic circuit which meets with the above requirements, there is known a dynamic circuit using, for example, a CMOS process. For example, Japanese Laid-Open Patent Application No. 58-111,436 (corresponding to U.S. patent application No. 308,072 filed Dec. 17, 1981) discloses a CMOS multistage dynamic logic circuit of a precharge type. Such a logic circuit of a precharge type operates on the basis of whether or not an n-MOS transistor draws out a charge which has been precharged by a p-MOS transistor and whose operation speed depends on the operation of the n-MOS transistor having a higher drive power than the p-MOS transistor.
With the dynamic circuit realized in the large scale integrated circuit, however, a software error is liable to occur because the charges in the precharged state tend to be inverted by charges induced by .alpha.-rays radiated from uranium contained in the package. This software error causes the misoperation of the logic circuit of the dynamic circuit. It is, therefore, necessary to take a measure against such a misoperation since otherwise a serious damage such as a breakdown of a database would possibly occur. Accordingly, when a dynamic circuit is utilized for the construction of a logic circuit operable at a high speed, it is important that a counter measure should be taken against such a software error.
On the contrary, a logic static circuit is free of such a software error. The static circuit (CMOS logic circuit) operates by the complementary switching operation of a p-MOS transistor or n-MOS transistor at a speed determined by the p-MOS transistor having a lower drive power than n-MOS transistor. Accordingly, the logic operation device of a static circuit type cannot operate at such a high speed as attained in the dynamic circuit. However, the static circuit type operation device is free of the above-mentioned software error caused due to the inversion of the charges and can operate with a high reliability.
Thus, whilst a logic circuit of a dynamic type operates at a higher speed than a logic circuit of a static type, the reliability of the former circuit is lower than the latter circuit because of the possible occurrence of misoperation as described above.